.intel_syntax noprefix
.section .text

.global halt
halt:
1:	hlt
	jmp 1b


.global set_gdt
set_gdt:
	lgdt [rdi]
	push rsi
	lea rax, 1f
	push rax
	retfq
1:	mov ds, rdx
	mov es, rdx
	mov fs, rdx
	mov gs, rdx
	mov ss, rdx
	ltr rcx
	ret

.global set_idt
set_idt:
	lidt [rdi]
	ret

.global disable_interrupts
disable_interrupts:
	cli
	ret

.global enable_interrupts
enable_interrupts:
	sti
	ret

.global get_cr2
get_cr2:
	mov rax, cr2
	ret

.global get_cr3
get_cr3:
	mov rax, cr3
	ret

#define DEFINE_ISRS \
	ISR(0) \
	ISR(1) \
	ISR(2) \
	ISR(3) \
	ISR(4) \
	ISR(5) \
	ISR(6) \
	ISR(7) \
	ISR_E(8) \
	ISR(9) \
	ISR_E(10) \
	ISR_E(11) \
	ISR_E(12) \
	ISR_E(13) \
	ISR_E(14) \
	ISR(15) \
	ISR(16) \
	ISR_E(17) \
	ISR(18) \
	ISR(19) \
	ISR(20) \
	ISR_E(21) \
	ISR(22) \
	ISR(23) \
	ISR(24) \
	ISR(25) \
	ISR(26) \
	ISR(27) \
	ISR(28) \
	ISR(29) \
	ISR(30) \
	ISR(31) 

.extern interrupt_handler
#define ISR(n)	\
isr_stub_##n: \
	mov rdi, n; \
	mov rsi, 0; \
	call interrupt_handler; \
	iretq;
#define ISR_E(n) \
isr_stub_##n: \
	pop rsi; \
	mov rdi, n; \
	call interrupt_handler;
	iretq;
DEFINE_ISRS
#undef ISR
#undef ISR_E

#define ISR(n)   .quad isr_stub_##n;
#define ISR_E(n) .quad isr_stub_##n;

.section .data
.global isr_stubs
isr_stubs:
DEFINE_ISRS
#undef ISR

.section .text
.global dump_regs
dump_regs:
	mov [rdi+0], rax
	mov [rdi+8], rbx
	mov [rdi+16], rcx
	mov [rdi+24], rdx
	mov [rdi+32], rsi
	mov [rdi+40], rdi
	mov [rdi+48], rsp
	mov [rdi+56], rbp
	mov [rdi+64], r8
	mov [rdi+72], r9
	mov [rdi+80], r10
	mov [rdi+88], r11
	mov [rdi+96], r12
	mov [rdi+104], r13
	mov [rdi+112], r14
	mov [rdi+120], r15
	lea rax, [rip]
	mov [rdi+128], rax
	pushf
	pop [rdi+136]
	mov rax, cr0
	mov [rdi+144], rax
	mov rax, cr2
	mov [rdi+152], rax
	mov rax, cr3
	mov [rdi+160], rax
	mov rax, cr4
	mov [rdi+168], rax
	mov rax, cr8
	mov [rdi+176], rax
	mov [rdi+184], cs
	mov [rdi+186], ds
	mov [rdi+188], ss
	mov [rdi+190], es
	mov [rdi+192], fs
	mov [rdi+194], gs
	ret